If you’re anything like me (heaven forbid), you’ve got an insatiable curiosity about what goes on inside your computer. You’ve probably got a pretty good idea about how the various components inside the box interact. But how does data move around in the system? After all, if I’ve got a processor that runs at something over a gigahertz, what keeps things on track? Why don’t all of those bits come crashing together?
If the processor is the brain of your computer, then the chipset is the central nervous system. Tortured metaphors aside, much of the chipset’s work is to make sure that data gets from one part of the computer to another, on time, in the right order and with the right values.
You’ve probably heard the term tossed around a lot. Companies like Intel, Via and SIS (along with many others) make chipsets for personal computers. But have you ever actually looked at a chipset? The next time the lid is off of your computer, take a look. Somewhere near the CPU is another fairly good sized chip. It might even have a heat sink on it, too. That’s the part of the chipset called the North Bridge. Its job is coordinate all of the data flowing to and from the CPU, memory and the AGP bus, as well as interface with the South Bridge, the part of the chipset that controls the PCI bus, USB, serial and parallel ports, as well as pretty much everything else that isn’t AGP or memory.
The hot and heavy action (in my opinion) goes on in the North Bridge, so that’s what this first installment is about. The biggest hit on the North Bridge, performance-wise, is the memory bus. Modern memory architectures operate with clock speeds from 100MHz to 333MHz. That means that a lot of data is moving in a very short time. The blink of an eye is an eternity in your chipset, even at slower clock speeds.
One of the biggest misconceptions about memory speed is that it is somehow directly related to CPU speed. This hasn’t been the case since before the 80486DX2 and DX4 processors were introduced. Instead, memory runs at some fraction of the processor speed, a rate called the bus speed. But that’s still only half the story.
For example, if you’ve got a Pentium III system of the same vintage as mine (around a year old), your computer uses PC133 SDRAM. You probably know that the PC133 part of the name refers to the bus speed, 133MHz. But that doesn’t mean that 133 million times a second some data pops in or out of memory. In fact, at its very best, data moves in and out of memory at half the clock speed…and usually it’s slower than that.
Why is that? Well, fundamentally it’s because the speed of light is just too slow! You see, signals move on your motherboard at about half the speed of light. That’s about 15,000,000 meters per second. While that seems pretty fast, the problem is that in a PC133 memory module, each clock tick takes about 7.5 nanoseconds…that’s 0.0000000075 seconds or 7.5 billionths of a second. In that miniscule tick of time, a lot needs to happen.
From the time that the clock generator ticks out a pulse, that signal has to make its way to the chipset. Then it has to go from the chipset to the DIMM. When it reaches the DIMM, we have to allow the briefest of time for the signal to stabilize. Only then can the memory send or receive any data.
So there’s the problem. One clock cycle just isn’t enough time to get everything done. Part of the problem is simple electronics…the modules have capacitances and resistances in them that affect the signal and cause it to turn from a very sharp, very square pulse into something a little more mushy. And to make sure that the module knows just where that data is supposed to go, the right address needs to get there in time. And once the address has arrived, the right chip on the module has to be turned on. Then the signals need time to settle down into their idle state. Hard to keep track in your head? Try doing it millions of times a second and you can see the difficulty.
So, for PC66, PC100 and PC133 SDRAM, the end result is that it takes at least two clock cycles to get everything set up for a data read or write. Then it takes a couple of cycles to get everything back to normal. That might make it seem like data is sent out only every fourth clock tick, but it’s possible to do a little better than that. You see, every DIMM has a 64 bit wide bus. So although your PC can only take in data in 32 bit chunks, the memory is sending it twice as much. Potentially, then, it’s possible to get a word of data every other clock cycle because the chipset will buffer the second 32 bits of data until the first 32 are sent down the PC’s 32 bit memory bus. The only problem, of course, is that often data reads and writes aren’t for the full 64 bits…which takes us back to the every fourth clock cycle problem.
Double data rate (DDR) memory solves this, after a fashion, and we’ll take a look at it in another article coming soon.